Signal processing generally refers to the performance of real-time operations on a data stream. Accordingly, typical signal processing applications include or occur in telecommunications, image processing, speech processing and generation, spectrum analysis and audio processing and filtering. In each of these applications, the data stream is generally continuous. Thus, the signal processor must produce results, “through-put”, at the maximum rate of the data stream.
Conventionally, both analog and digital systems have been utilized to perform many signal processing functions. Analog signal processors, though typically capable of supporting higher through-put rates, are generally limited in terms of their long term accuracy and the complexity of the functions that they can perform. In addition, analog signal processing systems are typically quite inflexible once constructed and, therefore, best suited only to singular application anticipated in their initial design.
A digital signal processor provides the opportunity for enhanced accuracy and flexibility in the performance of operations that are very difficult, if not impracticably complex, to perform in an analog system. Additionally, digital signal processor systems typically offer a greater degree of post-construction flexibility than their analog counterparts, thereby permitting more functionally extensive modifications to be made for subsequent utilization in a wider variety of applications. Consequently, digital signal processing is preferred in many applications.
Within a digital signal processor, a memory wrapper is an interface between a memory core and a sea of gates. A combination of a memory core and a memory wrapper can be considered a memory module. In FIG. 1, a memory interface (10) couples a CPU (12) to a single access memory module (14). Memory module (14) comprises a single bus (16) coupling a single access memory core (18) to a memory wrapper (20). Multiple buses (22) couple memory wrapper (20) to memory interface (10). In a single access memory module, such as memory module (14), only one access is performed in one cycle. In this embodiment, a system clock typically serves as the strobe of the memory core and the memory wrapper serves solely as a bus arbitrator that allows a CPU to perform a single access to the memory core in one cycle.